Memory Controller

Figure 1 - Memory Controller IO

Table 1 - Rx Application Interface

Signal Name	In/Out?	Width	Description
app_sof	In	1	Start-of-frame signal, indicating first word of application data
app_eof	In	1	End-of-frame signal, indicating last word of application data
app_data	In	32	Application data
app_data_en	In	1	Active High, data enable signal
app_rdy	Out	1	memory ready signal. Active High, when '1' memory is ready to receive data

Table 2 - RMAP Processor Interface

Signal Name	In/Out?	Width	Description
rmap_req	In	1	Active high. Signal requesting access to memory
rmap_ack	Out	1	Request grant signal, active high
rmap_sof	In	1	Start-of-frame signal, indicating first word of rmap read data
rmap_eof	In	1	End-of-frame signal, indicating last word of rmap read data
rmap_data	In	32	rmap data
rmap_data_en	In	1	rmap data enable, active High

Table 3 - Command Generator Interface

Signal Name	In/Out?	Width	Description
buf_valid	Out	1	Buffer ready signal, indicates that data is available for transmission over ethernet port
buf_ptr	Out	16	Pointer to buffer location
buf_size	Out	16	Size of buffer data in bytes

Table 4 - Memory Interface

Signal Name	In/Out?	Width	Description
mem_addr	Out	14	Memory address signals
mem_data	Out	32	Memory data signals
me_we	Out	1	Memory write enable

Table 5 - Tx Ethernet Interface

Signal Name	In/Out?	Width	Description
tx_done	In	1	Ethernet payload transmit done signal, active high
tx_size	In	16	Ethernet payload size, this signal is used to subtract the current read pointer to point to next buffer read location

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