== APP RX FFT == __Figure 1 - APP RX FFT Overview__ [[BR]][[BR]] [[Image(app_rx_fft.jpg, 1200px)]] [[BR]][[BR]] R3 architecture consists of following modules : * '''Ethernet Port''' - Ethernet framing function, [[BR]] * Rx - receives ethernet frames from Host. Performs CRC checking, and forwards error free payload to packet processor. * Tx - transmits ethernet frames to Host. Generates Ethernet header and CRC, IP payload is provided by packet processor. [[BR]] * '''Packet Processor''' - IP layer processing[[BR]] * Packet classification - RMAP, Data, and other (such as ARP and DHCP packets) * UDP is used for board level communication e.g. RMAP and Data packets * '''APP''' - User specific application [[BR]] * '''RF Port''' - DAC/ADC interfacing [[BR]] * '''Control Plane''' - RMAP and RF control [[BR]] * '''Timing Control''' - system wide clock control using clock enables [[BR]] From Host, we can control the hardware (RMAP read/write operations) by sending RMAP ethernet frame messages. The packet classifier classifies and forwards packets according to its type : * RMAP packets -> RMAP Processor * Data packets -> Tx Buffer for APP processing * Other packets -> TCP/IP stack [..]