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Version 1 (modified by seskar, 6 years ago) ( diff )

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Wideband Software Extensible Radio Platform (WiSER)

Table of Contents

  1. Wideband Software Extensible Radio Platform (WiSER)
    1. Framework
    1. Supported Hardware
      1. USRP N210
      2. USRP X310
      3. ZedBoard with Analog Devices FMC Radio Module
    1. FPGA Framework
    1. Embedded Firmware
    1. Host Software
      1. wiserd
        1. Receiver modules
        2. Transmitter modules
        3. Usage
        4. Module Parameters
        5. Development
    1. Tutorials
      1. Plain UHD tutorials
      2. RFNoC UHD tutorials
      3. WISER firmware tutorials
  2. GENI Cognitive Radio Kit (CRKIT)
    1. Applications
  3. RF Modules
  4. ISM RF Module (SDR)
  5. SDR with Frequency Extension Board (eSDR)
      1. FreeBo Registers
  6. Wide-tuning RF Module (WDR)
    1. Connector and SPI section
    1. A/D and D/A
      1. Configuration
  7. Ultra-wide baseband RF Module (XDR)
    1. R1
    1. Firmware Description
    1. CRKit Framework
    1. R1 Architecture
    1. R2 Architecture
    1. R3 Architecture
      1. Overview
      2. Global Memory Map
      3. Packet Formatting
      4. Control Flow
      5. Multi-clocks Synchronization
      6. Block Level Specifications
      7. FPGA Architecture
      8. RMAP/Interrupt Architecture
      9. CRKit HW Boot
    1. Ethernet Frame
    1. Data Packet
    1. Ethernet
    1. IPv4
    1. Checksum Calculation (source : wikipedia)
    1. R3 Architecture
    1. CRKit HW Boot
    1. Control Flow
    1. RMAP Packet
    1. Status Packet
    1. Transmission Control Protocol
    1. User Data Protocol
    1. CRKit Overview
    1. CRKit Release
    1. CRKit Tutorials
    1. Framework Build
    1. Build Simulink App
    1. How to setup Build environment
    1. How to setup Xilinx EDK libraries for simulation
    1. How to setup Xilinx ISE libraries for simulation
    1. How to setup Modelsim work folder
    1. How to setup CRKit svn folder
    1. Build Framework
    1. Build Software
    1. Prepare Xilinx ISE CRKit project
    1. Prepare MATLAB/Simulink
    1. How to run a simulation
      1. Testbench Overview
      2. Build Simulation Environment
    1. Build R1 Simulation Environment
    1. Build R3 Simulation Environment
    1. Environment Setup
      1. C: Partition
      2. D: Partition
      3. Modelsim
      4. Windows Environment Variable
      5. .bash_profile
      6. Summary
    1. How to compile Xilinx libraries for Modelsim simulation
    1. How to setup Modelsim work folder
    1. How to synchronize with CRKit svn folder
    1. How to compile Xilinx libraries for Modelsim simulations
    1. CR Kit Firmware Release Plans
    1. Future Requests
    1. R1
    1. R2
    1. R3
    1. R2 -> R3 updates
      1. RCVR
      2. XMTR
      3. Control
  8. DAC Interface

Dynamic spectrum access technology has the potential for order-of-magnitude improvement in spectrum efficiency necessary to cope with the recent explosion of mobile data traffic. Cognitive radio systems will also provide improved connectivity to end users, and enable new applications such as emergency response systems and automotive networks. This project will directly inform these important societal needs by enabling the research community to build state-of-the-art experimental systems for evaluation of these emerging technologies. The WiSER design significantly leverages prior design and development work on experimental SDR platforms funded by NSF ProWin (2003-2008) and GENI (2009-2011). It aims at enabling a richer range of experimental dynamic spectrum research supporting operation across 100MHz-6000MHz in >125MHz increments, hardware acceleration for real-world PHY waveforms at speeds of 100 Mbps and higher, hardware virtualization capable of supporting multiple radios on the same platform, and an open-source software toolkit.

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